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1/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. power management ics for automotive body control voltage detector ics with watchdog timer bd37a19fvm,bd37a41fvm,bd87a28fvm,bd87a29fvm bd87a34fvm,bd87a41fvm,BD99A41F description the bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm and BD99A41F are watchdog timer reset ics. it delivers a high precision detection voltage of ? 1.5% and a super-low current consumption of 5 a (typ.). it can be used in a wide range of electronic devices to monitor power supply voltages and in system operation to prevent runaway operation. features 1) high precision detection voltage: ? 1.5%, ? 2.5% (ta = ? 40 to 105 ) 2) super-low current consumption: 5 a (typ.) 3) built-in watchdog timer 4) reset delay time can be set with the ct pin's external capacitance. 5) watchdog timer monitor time and reset time can be set with the ctw pin's external capacitance. 6) output circuit type: n-channel open drain 7) package: msop8 (bd37a fvm, bd87a fvm) / sop8 (BD99A41F) applications all devices using microcontrollers or dsp, including vehicle equipment, displays, servers, dvd players, and telephone systems. product line inh logic h: active l: active model bd37a fvm BD99A41F bd87a fvm detection voltage 1.9 v/4.1v 4.1 v 2.8v/2.9v/3.4 v/4.1v no.10039eat12
technical note 2/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F absolute maximum ratings (ta = 25 ) parameter symbol ratings unit power supply voltage vdd ? 0.3 to 10 v ct pin voltage vct ? 0.3 to vdd + 0.3 v ctw pin voltage vctw ? 0.3 to vdd + 0.3 v reset pin voltage vreset ? 0.3 to vdd + 0.3 v inh pin voltage vinh ? 0.3 to vdd + 0.3 v clk pin voltage vclk ? 0.3 to vdd + 0.3 v power dissipation pd 470 *1 mw 550 *2 operating ambient temperature topr ? 40 to + 105 storage temperature tstg ? 55 to + 125 maximum junction temperature tjmax 125 *1 msop8 : reduced by 4.70 mw/ over 25 , when mounted on a glass epoxy board (70 mm 70 mm 1.6 mm). *2 sop8 : reduced by 5.50 mw/ over 25 , when mounted on a glass epoxy board (70 mm 70 mm 1.6 mm). recommended operating ranges (ta = ? 40 to 105 ) parameter symbol min. max. unit reset power supply voltage vdd reset 1.0 10 v wdt power supply voltage vdd wdt 2.5 10 v
technical note 3/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F electrical characteristics (unless otherwise specified, ta = ? 40 to 105 , vdd = 5 v) parameter symbol limits unit conditions min. typ. max. [overall] total supply current 1 (during wdt operation) idd1 ? 5 14 a inh : wdt on logic input ctw = 0.1 f total supply current 2 (when wdt stopped) idd2 ? 5 14 a inh : wdt off logic input output leak current ileak ? ? 1 a vdd = vds = 10 v output current capacity iol 0.7 ? ? ma vdd = 1.2 v, vds = 0.5 v [reset] detection voltage 1 1.9v detect vdet1 1.871 1.900 1.929 v ta = 25 2.8v detect vdet1 2.758 2.800 2.842 v ta = 25 2.9v detect vdet1 2.886 2.930 2.974 v ta = 25 3.4v detect vdet1 3.349 3.400 3.451 v ta = 25 4.1v detect vdet1 4.039 4.100 4.162 v ta = 25 detection voltage 2 1.9v detect vdet2 1.852 1.900 1.948 v ta = ? 40 to 105 2.8v detect vdet2 2.730 2.800 2.870 v ta = ? 40 to 105 2.9v detect vdet2 2.857 2.930 3.003 v ta = ? 40 to 105 3.4v detect vdet2 3.315 3.400 3.485 v ta = ? 40 to 105 4.1v detect vdet2 4.007 4.100 4.202 v ta = ? 40 to 105 hysteresis width 1.9v detect vrhys vdet 0.03 vdet 0.13 vdet 0.19 v ta = ? 40 to 105 2.8v detect vrhys vdet 0.018 vdet 0.045 vdet 0.060 v ta = ? 40 to 105 2.9v detect vrhys vdet 0.02 vdet 0.05 vdet 0.06 v ta = ? 40 to 105 3.4v detect vrhys vdet 0.02 vdet 0.05 vdet 0.07 v ta = ? 40 to 105 4.1v detect vrhys vdet 0.018 vdet 0.035 vdet 0.050 v ta = ? 40 to 105 reset transmission delay time: low ? high tplh 3.9 6.9 10.1 ms ct = 0.001 f *1 when vdd = vdet ? 0.5 v delay circuit resistance rrst 5.8 10.0 14.5 m vct = gnd delay pin threshold voltage vcth vdd 0.3 vdd 0.45 vdd 0.6 v rl = 470 k delay pin output current ict 150 ? ? a vdd = 1.50 v, vct = 0.5 v min. operating voltage vopl 1.0 ? ? v vol 0.4 v, rl = 470 k [wdt] wdt monitor time twh 7.0 10.0 20.0 ms ctw = 0.01 f *2 wdt reset time twl 2.4 3.3 7.0 ms ctw = 0.01 f *3 clock input pulse width twclk 500 ? ? ns clk high threshold voltage vclkh vdd 0.8 ? vdd v clk low threshold voltage vclkl 0 ? vdd 0.3 v clk high threshold voltage vinhh vdd 0.8 ? vdd v clk low threshold voltage vinhl 0 ? vdd 0.3 v ctw charge current ictwc 0.25 0.50 0.75 a vctw = 0.2 v ctw discharge current ictwo 0.75 1.50 2.00 a vctw = 0.8 v *1 tplh can be varied by changing the ct capacitance value. tplh (s) ? 0.69 rrst (m ) ct (f) rrst = 10 m (typ.) *2 twh can be varied by changing the ct capacitance value. twh (s) ? (0.5 ctw (f))/ictwc (a) ictwc = 0.5 a (typ.) *3 twl can be varied by changing the ctw capacitance value. twl (s) ? (0.5 ctw (f))/ictwo (a) ictwo = 1.5 a (typ.) note: this ic is not designed to be radiation-resistant.
technical note 4/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F 0 0.25 0.5 0.75 1 -40 0 40 80 ambient temperature: ta [ ] operating voltage: vopl [v] 3.5 3.75 4 4.25 4.5 4.75 5 -40 0 40 80 ambient temperature: ta [ ] detection voltage: vdet [v] 0.1 1 10 100 1000 10000 0.001 0.01 0.1 1 10 ctw pin capacity: ctw [v] wdt reset time: tw [ms ] 0 3 6 9 12 15 -40 0 40 80 ambient temperature: ta [ ] wdt reset time: tw [ms ] 8 9 10 11 12 13 -40 0 40 80 ambient temperature: ta [ ] output delay resistance: rrst [m] 5 6 7 8 9 10 - 40 0 40 80 ambient temperature: ta [ ] output delay time: tplh [ms] 0 200 400 600 800 1000 1200 1400 012345 supply voltage: vdd [v] ct pin current: ict [a] 0 2 4 6 8 10 12 0246810 supply voltage: vdd [v] output voltage: vout [v] 0 2 4 6 8 10 024 6810 supply voltage: vdd [v] circuit current: idd [a] 1 10 100 1000 10000 0.0001 0.001 0.01 0.1 ct pin capacity: ct [f] output delay time: tplh [ms] -1 -0.5 0 0.5 1 1.5 2 012 345 ctw pin voltage: vctw [v] ctw pin current: ictw [a] 0 0.5 1 1.5 2 02 46 810 reset voltage: vreset [v] reset current: ireset [ma] reference data (unless otherwise specified, ta = 25 ) : 4.1v detection moniter time reset time l h h l moniter time reset time ta =25 ta =-4 0 ta =10 5 ta =10 5 ta =25 ta =-4 0 fig.1 detection voltage fig.2 total supply current fig.3 delay pin current vs power supply voltage fig.4 ctw charge discharge curr ent fig.5 output current fig.6 reset transmission delay time vs capacitance fig.7 wdt time vs capacitance fig.8 detection voltage vs tem p erature fig.9 operating marginal voltage vs temperature fig.10 ct pin circuit resistance vs temperature fig.11 reset transmission dela y time vs temperature fig.12 wdt time vs temperature
technical note 5/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F block diagram bd37a fvm bd87a fvm / BD99A41F ct pin capacitor: 470 pf to 3.3 f ctw pin capacitor: 0.001 f to 10 f fig.13 pin assignments fig.14 bd37a fvm bd87a fvm / BD99A41F no. pin name function no. pin name function 1 clk clock input from microcontroller 1 ctw wdt time setting capacitor connection pin 2 ct reset delay time setting capacitor connection pin 2 ct reset delay time setting capacitor connection pin 3 ctw wdt time setting capacitor connection pin 3 clk clock input from microcontroller 4 vdd power supply pin 4 gnd gnd pin 5 n.c. nc pin 5 vdd power supply pin 6 gnd gnd pin 6 inh wdt on/off setting pin inh=h/l:wdt=off/on(bd87a fvm) inh=h/l:wdt=on/off(BD99A41F) 7 inh wdt on/off setting pin inh=h/l:wdt=on/off 7 n.c. nc pin 8 reset reset output pin 8 reset reset output pin reset inh vref vdd gnd n.c. vdd pulse generation circuit vthh vthl r s q r s q + + + clk ct ctw vdd 1 2 3 4 8 7 6 5 ctw ct clk gnd reset n.c. vref vdd inh vdd vdd pulse generation circuit vthh vthl r s q r s q 1 2 3 4 5 6 7 8 + + + 8765 1234
technical note 6/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F i/o circuit diagram ct inh ct ctw reset fig.15 timing chart fig.16 reset ct w vdd vdd cl k vdd inh vdd ct 10 (typ.) vdd vdd (5) (6) (5) (7) (7) (4) (5) (8) (9) (10) (3) (3) (11)(10) (4) (2) (4) (5) (10) (2) (4) (5) (4) ( 5 ) (4) inh vctw clk r eset (1) (2) (3) 0 0 0 0 0 wdt circuit turns off when inh is high. twclk *4 twclk vthh vthl *1 tplh *3 twl *2 twh vct vcth inh vdd vdeth vdet wdt circuit turns off when inh is low. 0 0 v deth = vdet + vrhys (bd37a fvm BD99A41F) (bd87a fvm)
technical note 7/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F explanation 1) the reset pin voltage (reset) switches to low when the power supply voltage (vdd) falls to 0.8 v. 2) the external capacitor connected to the ct pin begins to charge when vdd rises above the reset detection voltage (vdeth). the reset signal stays low until vdd reaches t he vdeth voltage and switches to high when vdd reaches or exceeds the vdeth voltage. the reset transmission dela y time tplh allowed to el apse before reset switches from low to high is given by the following equation: tplh (s) ? 0.69 rrst ct (f) ? ? [1] rrst denotes the ic's built-in resi stance and is designed to be 10 m (typ.). ct denotes the external capacitor connected to the ct pin. 3) the external capacitor connected to the ctw pin begins to charge when reset rises, triggering the watchdog timer. 4) the ctw pin state switches from charge to discharge when the ctw pin voltage (vctw) reaches vthh, and reset switches from high to low. the watchdog timer monitor time twh is given by the following equation: twh (s) ? (0.5 ctw (f))/(ictwc) ? ? [2] ictwc denotes the ctw charge current and is designed to be 0.50 a (typ.). ctw denotes the external capacitor connected to the ctw pin. 5) the ctw pin state switches from charge to discharge when vctw reaches vthl, and reset switches from low to high. the watchdog timer reset time twl is given by the following equation: twl (s) ? (0.5 ctw (f))/(ictwo) ? ? [3] ictwo denotes the ctw discharge current and is designed to be 1.50 a (typ.). 6) the ctw pin state may not switch from charge to discharge when the clk input pulse width twclk is short. use a twclk input pulse width of at least 500 ns. twclk 500 ns (min.) 7) when a pulse (positive edge trigger) of at least 500 ns is input to the clk pin while the ctw pin is charging, the ctw state switches from charge to discharge. once it discharges to vthl, it will charge again. 8) watchdog timer operation is forced off when the inh pin switches to low:bd37a fvm (switches to high: bd87a fvm, bd97a41f). at that time, only the watchdog time r is turned off. reset detection is performed normally. 9) the watchdog timer function turns on when the inh pin switc hes to high. the external capacitor connected to the ctw pin begins to charge at that time. 10) reset switches from high to low when vdd falls to the reset detection vo ltage (vdet) or lower. 11) when vdd falls to 0 v, the reset signal stays low until vdd reaches 0.8 v. heat reduction curve msop8 sop8 f ig.17 ambient temperature: ta [ ] 0 400 200 25 50 75 125 100 0 power dissipation: pd [mw] 600 470mw 800 105 when mounted on a glass epoxy board (70 mm ? 70 mm ? 1.6mm) ? ja = 212.8 (c /w) ambient temperature: ta [ ] 0 400 200 25 50 75 125 100 0 power dissipation: pd [mw] 600 550mw 800 105 when mounted on a glass epoxy board (70 mm ? 70 mm ? 1.6mm) ? ja = 181.8 (c /w)
technical note 8/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F external settings for pins and precautions 1) connect a capacitor (0.001 f to 1,000 f) between the vdd and gnd pins when the power line impedance is high. use of the ic when the power line impedance is high may result in oscillation. 2) external capacitance a capacitor must be connected to the ctw pin. when using a la rge capacitor such as 1 f, the inh pin must allow a ctw discharge time of at least 2 ms. the power-on reset time is given by equation [1] on page 5. the wdt time is given by equations [2] and [3] on page 5, 6. the setting times are propor tional to the capacitance value from the equations, so the maximum and minimum setting times can be calculated from the electrical characteristics according to the capacitance. note however that the electrical charac teristics do not include the external ca pacitor's temperature characteristics. notes for use 1) absolute maximum ratings an excess in the absolute maximum ratings , such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify br eaking mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) gnd voltage the potential of gnd pin must be minimu m potential in all operating conditions. 3) thermal design use a thermal design that allows for a suffic ient margin in light of the power dissipa tion (pd) in actual operating conditions. 4) inter-pin shorts and mounting errors use caution when positioning the ic fo r mounting on printed circuit boards. t he ic may be damaged if there is any connection error or if pins are shorted together. 5) actions in strong electromagnetic field use caution when using the ic in the presence of a strong electr omagnetic field as doing so may cause the ic to malfunction. 6) testing on application boards when testing the ic on an application boar d, connecting a capacitor to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection pr ocess. ground the ic during assembly steps as an antistatic measure. use similar precaution wh en transporting or storing the ic. 7) regarding input pin of the ic this monolithic ic contains p+ isolation and p substrate layers between adjacent el ements in order to keep them isolated. p-n junctions are formed at the intersection of these p layers wi th the n layers of other elem ents, creating a parasitic diode or transistor. for example, the relation between each potential is as follows: when gnd > pin a and gnd > pin b, the p-n junction operates as a parasitic diode. when gnd > pin b, the p-n junction o perates as a parasitic transistor. parasitic diodes can occur inevitable in the structure of th e ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the gnd (p substrate) voltage to an input pin, should not be used. gnd n p n n p+ p+ parasitic element or transistor p substrate (pin b) c b e transistor (npn) parasitic element (pin a) gnd n p n n p+ p+ resistor p parasitic element (pin a) parasitic element or transistor (pin b) gnd c b e fig. 18 example of ic structure
technical note 9/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F 8) ground wiring pattern when using both small signal and large current gnd pattern s, it is recommended to isolate the two ground patterns, placing a single ground point at the gr ound potential of applicatio n so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external components, either. 9) applications or inspection processes with modes where the potentials of the vdd pin and other pins may be reversed from their normal states may cause damage to the ic?s internal circ uitry or elements. use an output pin capacitance of 1000 f or lower in case vdd is shorted with the gnd pin while the ex ternal capacitor is charged. it is recommended to insert a diode for preventing back current flow in series with vdd or bypass diodes between vcc and each pin. fig.19 10) when vdd falls below the operating marginal voltage, out put will be open. when output is being pulled up to input, output will be equivalent to vdd. 11) input pin the clk and inh pins comprise inverter gates and should not be left open. (these pins should be either pulled up or down.) input to the clk pin is detect ed using a positive edge trigger and does no t affect the clk signal duty. input the trigger to the clk pin within the twh time. bypass diode vdd back current prevention diode pin
technical note 10/10 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd37a19fvm, bd37a41fvm, bd87a28fvm, bd87a29fvm, bd87a34fvm, bd87a41fvm, BD99A41F ordering part number b d 3 7 a 1 9 f v m - t r part no. bd part no. 37a19, 37a41, 87a28, 87a29, 87a34, 87a41 99a41 package fvm : msop8 f : sop8 packaging and forming specification tr: embossed tape and reel (msop8) e2: embossed tape and reel (sop8) ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin (unit : mm) sop8 0.9 0.15 0.3min 4 + 6 ? 4 0.17 +0.1 - 0.05 0.595 6 4 3 8 2 5 1 7 5.0 0.2 6.2 0.3 4.4 0.2 (max 5.35 include burr) 1.27 0.11 0.42 0.1 1.5 0.1 s 0.1 s direction of feed reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper right when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs tr () 1pin (unit : mm) msop8 0.08 s s 4.0 0.2 8 3 2.8 0.1 1 6 2.9 0.1 0.475 4 5 7 (max 3.25 include burr) 2 1pin mark 0.9max 0.75 0.05 0.65 0.08 0.05 0.22 +0.05 ? 0.04 0.6 0.2 0.29 0.15 0.145 +0.05 ? 0.03 4 + 6 ? 4
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